1. Field of the Invention
The present invention relates to a semiconductor memory device, more specifically to a semiconductor memory device configured as an arrangement of memory cells that are provided with a variable resistor and are operative to store data by changing the resistance of the variable resistor.
2. Description of the Related Art
In recent years, along with a rising level of integration in semiconductor devices, circuit patterns of transistors and the like which configure the semiconductor devices are being increasingly miniaturized. Required in this miniaturization of the patterns is not simply a thinning of line width but also an improvement in dimensional accuracy and positional accuracy of the patterns. This trend applies also to semiconductor memory devices.
Conventionally known and marketed semiconductor memory devices such as DRAM, SRAM, and flash memory each use a MOSFET as a memory cell. Consequently, there is required, accompanying the miniaturization of patterns, an improvement in dimensional accuracy at a rate exceeding a rate of the miniaturization. As a result, a large burden is placed also on the lithography technology for forming these patterns which is a factor contributing to a rise in product cost.
In recent years, resistance varying memory is attracting attention as a candidate to succeed these kinds of semiconductor memory devices utilizing a MOSFET as a memory cell (refer, for example, to Japanese Unexamined Patent Application Publication (Translation of PCT Application) No. 2005-522045). For example, there is known a resistance change memory (ReRAM: Resistive RAM) that has a transition metal oxide as a recording layer and is configured to store a resistance state in a nonvolatile manner.
Write of data to a memory cell is implemented by applying for a short time to a variable resistor a certain setting voltage Vset. As a result, the variable resistor changes from a high-resistance state to a low-resistance state. Hereinafter, this operation to change the variable resistor from a high-resistance state to a low-resistance state is called a setting operation.
In contrast, erase of data in the memory cell MC is implemented by applying for a long time to the variable resistor in the low-resistance state subsequent to the setting operation a resetting voltage Vreset which is lower than the setting voltage Vset of a time of the setting operation. As a result, the variable resistor changes from the low-resistance state to the high-resistance state. Hereinafter, this operation to change the variable resistor from a low-resistance state to a high-resistance state is called a resetting operation. The memory cell, for example, has the high-resistance state as a stable state (a reset state), and, in the case of binary data storage, data write is implemented by the setting operation which changes the reset state to the low-resistance state.
In this kind of conventional resistance change memory, a margin between the setting voltage Vset and the resetting voltage Vreset is small. In a case that the margin is small, there is a chance of a false operation such as a false resetting operation occurring, which is undesirable. A case is considered, for example, where the resetting operation for changing the variable resistor in the low-resistance state to the high-resistance state is implemented using the resetting voltage Vreset. In this case, when the variable resistor is in the low-resistance state, there is not a high voltage applied between terminals of the variable resistor; however, at a moment that the variable resistor shifts to the high-resistance state, a voltage exceeding the setting voltage may be applied to the variable resistor. In such a case, a situation may arise in which the variable resistor once returned to the high-resistance state gets shifted back once again to the low-resistance state (false setting operation). Consequently, there is desired a memory cell in which a large margin can be provided between the setting voltage and the resetting voltage.
Moreover, subsequent to forming a memory cell structure in this kind of resistance change memory, it is necessary to apply to the memory cell a forming voltage which is a voltage greater than a write voltage in order to set the memory cell to a state where it is usable as a memory cell. From a perspective of reducing power consumption, it is desirable to set this forming voltage as low as possible.